STFleming/StitchUp

StitchUp is a classic example of an academic research artifact that has reached the end of its lifecycle. With only 9 stars and no activity in over a decade (3931 days), the project lacks any contemporary momentum. It was designed to work with LegUp HLS, an academic tool that has since transitioned into commercial ownership (acquired by Microchip). From a competitive standpoint, the defensibility is minimal. While the underlying domain knowledge regarding Triple Modular Redundancy (TMR) and fault-tolerant scheduling in HLS is complex, modern EDA (Electronic Design Automation) suites from industry giants like AMD/Xilinx (Vitis HLS), Intel, and Synopsys have largely integrated or superseded these capabilities at the netlist or synthesis level. The platform domination risk is high because hardware vendors provide their own proprietary reliability tools (e.g., Xilinx Soft Error Mitigation IP) which are more robust and maintained. This project remains useful only as a historical reference for researchers looking at how fault tolerance can be automated at the LLVM-IR level before hardware generation.